When two silicon wafers are bonded at room temperature, the bonding progresses from one side of an outer peripheral edge of each wafer toward the opposite side of the outer peripheral edge. Finally, air may be enclosed by the bonding and remain, causing micro-size voids at the outer peripheral portion (hereinafter, referred to as outer-peripheral micro voids) in some cases.
An outer-peripheral micro void is formed in a region 3 to 5 mm from an edge of an outer peripheral portion of a wafer and has such a size that the diameter is about 0.1 to 1 mm. There is a trend that increasing the bonding speed during the bonding increases the outer-peripheral micro voids.
When two wafers stacked on each other are partially pressed, the bonding of the wafers extends over the entire interface owing to attraction force that acts between the surfaces with low roughness and high precision. Thus, the bonding speed can be measured by observing the advancement of the bonding wave with an infrared camera or the like.
To increase the bonding strength in bonding wafers, the surface(s) to be bonded is/are subjected to a plasma treatment (in which the surface(s) to be bonded is/are exposed to plasma and activated). Thereby, the bonding speed is increased, so that outer-peripheral micro voids are likely to be generated.
Patent Document 1 states in paragraph [0061] that “edge voids”, which are voids appearing at an outer peripheral portion of a bonded wafer, can be suppressed when the bonding speed is less than 1.7 cm/s. Moreover, Patent Document 2 states in [0005] and [0006] that setting a contact wave speed of 50 mm/second or less can suppress micro voids at an outer peripheral portion of a wafer. Patent Document 1 states that heating decreases the thickness of a water layer adsorbed at the wafer surface. Patent Document 2 states that the bonding progression speed is controlled by controlling the pressure, type, and viscosity of an atmosphere in a bonding environment. However, it cannot be said these are simple methods.